OMG! Cell to be 4.6GHZ! Sony will DEBUT the CELL in FEB 05!!

[Mr_Nothin]

http://pcweb.mycom.co.jp/news/2004/11/29/011bl.jpg
http://www.theregister.co.uk/2004/11/29/ibm_sony_cell_debut/
:shock:
Those 2 say it all
The Workstations are pulling a whooping 2TFLOPS
this is great news indeed

"As for the Cell-based workstation, it's clearly only at the prototype stage, IBM and Sony having come up with an "experimental model".

Still, it packs 2 teraflops into a standard (presumably) rackmount box, apparently, with what sounds like multiple, multi-core chips operating as a kind of cluster-in-a-box configuration. ®"

[kevindenoyette]

erm, i dunno. the first sheet says it runs at 85°C, which is seriously ridiculously high. and that's with a heatsink! second sheet says it'll ship first in 90nm, not 65. hmmm.

[Fats]

It's only at the prototype stage at the moment though, so perhaps they'll find a way to reduce temperature. :?

[PlayBoy]

The Workstations are pulling a whooping 2TFLOPS

No, it's 16TFlops :) The Register article got f@cked up, it seems.
Besides, it's up and running in 2004 enabled with worse technology available than the late 2005 when PS3 production starts :wink:

[kevindenoyette]

source?

[Mr_Nothin]

http://www.gfdata.de/gamefront-temp/sonycell1.pdf
theres your stinky freakin source
heh
it is 16 tflops!!!
goodness gracious great balls of fire
the cell is cool
even if it is hot...
and notice how it says 85C with just a heatsink
no fan yet..
im sure they would have mentioned it if it had 1
this came as a total surprise to me today
CELL proc is powerful
i dont care what anybody says.....
its powerful PERIOD
and this is for a game system...haaaaaa
just imagine the possibilities
we might see SOME form of raytracing
even if its not very accurate or precise
its still ray tracing

[kevindenoyette]

your source doesn't mention the flops. i read the one that does, and it isn't definite yet so don't get your hopes up, they expect to be able to do it, but i'm pretty sure it won't happen. also, 85° even with just a heatsink is way too high.

[The_One]

your source doesn't mention the flops. i read the one that does, and it isn't definite yet so don't get your hopes up, they expect to be able to do it, but i'm pretty sure it won't happen. also, 85° even with just a heatsink is way too high. Actually... P4 processors run upward to 103 degrees C... 85 degrees C isn't high at all (considering that it doesn't have a fan YET).

[kevindenoyette]

I'm just saying that if they can't get the temperature down ( a p4 only runs that high at maximum load, and with proper cooling it hardly ever goes over 65°) then it might be a problem. Most pc's run at 40-50 degrees, I dunno about consoles, but 85° seems really high. I wonder if they'll give liquid cooling a go?

[Mr_Nothin]

sorry
wrong link
http://www.gfdata.de/gamefront-temp/sonycell2.pdf
why not get my hopes up
everything next gen will be better
why not get my hopes up??

[j^aws]

your source doesn't mention the flops. i read the one that does, and it isn't definite yet so don't get your hopes up, they expect to be able to do it, but i'm pretty sure it won't happen. also, 85° even with just a heatsink is way too high.

http://www.beyond3d.com/forum/viewtopic.php?p=419736#419736

2nd pdf...16TFlop per Rack for CELL workstation! :)

[The_One]

your source doesn't mention the flops. i read the one that does, and it isn't definite yet so don't get your hopes up, they expect to be able to do it, but i'm pretty sure it won't happen. also, 85° even with just a heatsink is way too high.

http://www.beyond3d.com/forum/viewtopic.php?p=419736#419736

2nd pdf...16TFlop per Rack for CELL workstation! :) Hehehe. 16TFLOp/s... That's almost half as powerful as the NEC Earth Simulator!! :shock:

Too bad we won't see this kind of performance for the PS3 itself :(. Oh well, I'm still hoping that the PS3 will crunch out at least 1TFLOp/s.

[j^aws]

http://pcweb.mycom.co.jp/news/2004/11/29/011bl.jpg

90nm Cell processor at 4.60 GHz @ 1.3V / 85°C (heatsink without fan) for first gen...

Japanese article about ISSCC 2005 highlights (http://pcweb.mycom.co.jp/news/2004/11/29/011.html)

[The_One]

That's just sweet.... I can operate a Cell with my normal alkaline battery :lol:.

[kevindenoyette]

i wonder where they got the 4.6 ghz spec from? the original patent was 4 ghz wasn't it?

[The_One]

i wonder where they got the 4.6 ghz spec from? the original patent was 4 ghz wasn't it? Yes, but did you really expect the patent to be 100% accurate? The patent WAS filed 4 years ago ya know :roll:?

[kevindenoyette]

I never expected them to attain 4ghz, let alone go past it. that's why i think it's weird.

[j^aws]

I never expected them to attain 4ghz, let alone go past it. that's why i think it's weird.

It's for one PE (8APUs + PU) as a Cell chip and not fig6 of the BE(broadband engine)

[cpiasminc]

No, it's 16TFlops The Register article got f@cked up, it seems.
Actually, no. The Register article says 2 TFlops in a single rackmount box, not the whole rack. The equivalent of 8 PEs at 4 GHz.

It's for one PE (8APUs + PU) as a Cell chip and not fig6 of the BE(broadband engine)
Well, the modular nature of Cell suggests that no matter how many APUs or PEs you have, ultimately, the chip's final clock speed is the speed of the slowest individual APU. But for 4 PEs, you have the issues of yield percentages and volume. Even if you bring the clock speed down by half and produce 4 PEs per CPU, that's a net gain in performance. But there's more volume and less fab strain using only 1 PE at full clock. Of course, if you get 4 PEs at 65 nm, that's only around twice the die space to 1 PE at 90 nm... not including the eDRAM, that is.

I still have to wonder what the yield percentages must be to get 4.6 GHz on 90nm at a measly 1.3 V. Those APU pipes must be disgustingly long (or at least be to a G5 what P4 was to P3). Still, even if it's a 10% yield on 90nm, it can be much higher at 65, assuming they have the time for the 65nm node to mature, which by 2006 should be doable. Only other problem is heat, though... If you have more than half the power consumption on a die that's less than half the area, you've got a net rise in temperature.

Yeesh... I figured we'd see 2 GHz or something, but I would not have expected even a demo unit above 4. 294.4 GFLOPs to a PE is damn cool if they can actually produce at that rate. Now it makes a little more sense why they had a weird clock speed like 1.15 GHz in those samples (divides evenly into 4.6). There is one nice thing about the high clock speed, though. At least single-thread scalar op performance will be decent -- approaching K8 levels.

Granted, GPU clock would be another matter entirely. But with the SALC/SALPs pixel engine design, I think they'd be able to get a lot higher clock speed.

[Dralor]

Are you saying a lot higher clock in reference to present gpu's or to cell because if you mean cell that would just be insane. Oh and by the way the cell running at 4.6GHz had a core temp of 85°C with a heatsink on it.

[Domination]

image (http://pcweb.mycom.co.jp/news/2004/11/29/011bl.jpg)

90nm Cell processor at 4.60 GHz @ 1.3V / 85°C (heatsink without fan) for first gen...

Japanese article about ISSCC 2005 highlights (http://pcweb.mycom.co.jp/news/2004/11/29/011.html)

Where is Deadmeat? You notice he has not shown his face during this discussion. I wonder why. :roll:

[Dralor]

Say his name three times and he will appear. I caution though he will not leave after you've called him so if you do were stuck with his bs. :lol:

[Domination]

No, it's 16TFlops The Register article got f@cked up, it seems.
Actually, no. The Register article says 2 TFlops in a single rackmount box, not the whole rack. The equivalent of 8 PEs at 4 GHz.

It's for one PE (8APUs + PU) as a Cell chip and not fig6 of the BE(broadband engine)
Well, the modular nature of Cell suggests that no matter how many APUs or PEs you have, ultimately, the chip's final clock speed is the speed of the slowest individual APU. But for 4 PEs, you have the issues of yield percentages and volume. Even if you bring the clock speed down by half and produce 4 PEs per CPU, that's a net gain in performance. But there's more volume and less fab strain using only 1 PE at full clock. Of course, if you get 4 PEs at 65 nm, that's only around twice the die space to 1 PE at 90 nm... not including the eDRAM, that is.

I still have to wonder what the yield percentages must be to get 4.6 GHz on 90nm at a measly 1.3 V. Those APU pipes must be disgustingly long (or at least be to a G5 what P4 was to P3). Still, even if it's a 10% yield on 90nm, it can be much higher at 65, assuming they have the time for the 65nm node to mature, which by 2006 should be doable. Only other problem is heat, though... If you have more than half the power consumption on a die that's less than half the area, you've got a net rise in temperature.

Yeesh... I figured we'd see 2 GHz or something, but I would not have expected even a demo unit above 4. 294.4 GFLOPs to a PE is damn cool if they can actually produce at that rate. Now it makes a little more sense why they had a weird clock speed like 1.15 GHz in those samples (divides evenly into 4.6). There is one nice thing about the high clock speed, though. At least single-thread scalar op performance will be decent -- approaching K8 levels.

Granted, GPU clock would be another matter entirely. But with the SALC/SALPs pixel engine design, I think they'd be able to get a lot higher clock speed.

I predicted this would happen although I, too, was a bit surprised by the prototype having such a high clock speed. I was expecting around 3.5 to 3.7. Now, I'm really begining to think our aim was way off. All that's left now is to put this thing to the test for the console.

[solidus]

I can honestly say i didn't expect this high of a clock speed, my expectations were around 3GHz max. I'm gonna carefully read trough all the articles to make sure i'm not overlooking anything.

[cpiasminc]

Are you saying a lot higher clock in reference to present gpu's or to cell because if you mean cell that would just be insane. Oh and by the way the cell running at 4.6GHz had a core temp of 85°C with a heatsink on it.
In reference to present GPUs. The arithmetic design is really simple and would allow some pretty high clock speeds as compared to the usual wide-issue pipes.

Well, they say 85°C with a heatsink, but that doesn't conclusively say that it's passive cooling (heatsink can imply a fan when it's a talk slide). Of course, if these samples are, for instance, going into a blade or something, then okay -- it's probably passive with a case fan. Still, when you go to 65nm... If you assume perfect scaling, you'll have 52% of the die size. Say the same clock speed is achieved on 65 nm at 1.0 Vcc. That means your power consumption will be around 59% that of the 90nm model. That makes for a higher die temperature with the same cooling.

[_Deadmeat]

Now it makes a little more sense why they had a weird clock speed like 1.15 GHz in those samples
Your eyes didn't deceive you; what you saw is what SCEI is about to demonstrate.

4.6 Ghz refers to APU SRAM cache receiving packets from 4.6 Ghz XDR. They are synchronized to ensure maximum throughput.

4.6 Ghz(SRAM) * 4 byte = 1.15 Ghz(APU) * 16 Byte.

So yes, CELL is currently running at 1.15 Ghz right now, just as you have seen it.

[Domination]

Now it makes a little more sense why they had a weird clock speed like 1.15 GHz in those samples
Your eyes didn't deceive you; what you saw is what SCEI is about to demonstrate.

4.6 Ghz refers to APU SRAM cache receiving packets from 4.6 Ghz XDR. They are synchronized to ensure maximum throughput.

4.6 Ghz(SRAM) * 4 byte = 1.15 Ghz(APU) * 16 Byte.

So yes, CELL is currently running at 1.15 Ghz right now, just as you have seen it.

I'm going to pretend I didn't hear him say that.

[_Deadmeat]

Remember that cpiasminc was one of few people who happened to see the real CELL running at 1.15 Ghz and wondering if he was mistaken; I am assuring him that what he saw was what it is and CELL is indeed running at 1.15 Ghz.

That SRAM buffer running at 4.6 Ghz to synchronize with XDR interface was overblown here.

Afterall, was it not SCEI's own PSX3 platform manager himself that confirmed that high clock was difficult to achieve this time so they were going "slow and wide" this time????

CELL runs at 1.15 Ghz@85C, as witnessed by cpiasminc. He will be able to put it all together.

[semiconductor]

http://pcweb.mycom.co.jp/news/2004/11/29/011bl.jpg
http://www.theregister.co.uk/2004/11/29/ibm_sony_cell_debut/
:shock:
Those 2 say it all
The Workstations are pulling a whooping 2TFLOPS
this is great news indeed

"As for the Cell-based workstation, it's clearly only at the prototype stage, IBM and Sony having come up with an "experimental model".

Still, it packs 2 teraflops into a standard (presumably) rackmount box, apparently, with what sounds like multiple, multi-core chips operating as a kind of cluster-in-a-box configuration. ®"

It's a typical Sony hype,i don't think we see 4,6 GHZ,in yesterday Sony says that the Ps3 CPU has a low level speedrange,1GHZ -2GHZ i think,because the case of consoles to small for that speedrange and temperatures.The 16terraflops are mean for the Workstation not for
the console,the Workstation has more then one CPU,for the PS3 we
see 0,5 - 1 terraflops.An another problem i've seen is the graphic engine,
there are a lot of APU's,APU's are not specialised for 3D rendering like
pixel,vertex,light shaders,it's a bottle-neck ,APU's are to much generic for fast 3D gaming,specially in the point of antialaising,texturefilter.

[solidus]

For those of you wondering where this 2 TFLOPS rack came from, it was straight from Kutaragi Ken's own mouth...
It came from his presentation, make some logical calculations and you'll come to the same conclusion.

[kevindenoyette]

So now the rumour is that it's 4 PE's clocked at 1.15 Ghz, total clockspeed of all four cores is 4.6 Ghz?

[Dralor]

No it is a 4.6Ghz single cell chip running at 1.3V and 85°C. It is probably just on PE but that is what it shows on the slides and this is just a 90nm prototype version.

[Ferrismc]

Top or Flop the Cell ?
Will it be far better than Xbox or Nintendo or do i have to think which of the next gen consoles to choose. What's with Xbox. How much Flops will it probably achieve, from Nintendo nothing is known.

[Domination]

So now the rumour is that it's 4 PE's clocked at 1.15 Ghz, total clockspeed of all four cores is 4.6 Ghz?

Let's put it this way: the slides are from STI themselves. Deadmeat is obviously in denial. If I were you, I wouldn't listen to a single word from him. He's a complete, adamant fanboy, which was the main reason he was banned from numerous sites multiple times -- including this one. I believe he's on his eighth screen name here.

For more stories on how full of crap this guy is, you can go to Beyond3D or Opa-Ages.com.

[kevindenoyette]

I know he's full of shit Domination, but it's just that it seems pretty logical that the 4.6 comes from 4 pe's at 1.15 Ghz. I'll take your word for it though.

[SERAPHIM]

Hmm the succes of the CELL chip is tempting me to think about buying a PS3. Of course I'll probably buy it around 6 months later after most of the first generation ones have been sold.

[xbdestroya]

Ok, the point Deadmeat brought up, (I hate to encourage), does intrigue me. In the end I suppose it doesn't much matter because the flop performance is the flop performance and that seems to have been met - but I just want to understand when we say 4.6 Ghz, what is it that's at 4.6 Ghz? When I read the article(s) this morning, I of course thought it was processor speed. And I consider myself fairly tech savvy as well - but I could see this sort of marketing gamesmanship being pulled, so any in-depth analysis would be much appreciated. (cpiasminc I guess that means you! :wink: )On the console front, it already seems that PS3 is going to be pretty good - but 1.15 Ghz vs 4.6 Ghz will speak loads about what might be accomplished in the future by this chip, so just coming from a 'wanna know what's going on...' standpoint on this question.

[The_One]

Deadmeat is obviously in denial. If I were you, I wouldn't listen to a single word from him. He's a complete, adamant fanboy, which was the main reason he was banned from numerous sites multiple times -- including this one. I believe he's on his eighth screen name here.

For more stories on how full of crap this guy is, you can go to Beyond3D or Opa-Ages.com.Would you by any chance have called on his name three times, Domination? :mrgreen:.
So yes, CELL is currently running at 1.15 Ghz right now, just as you have seen it. And let’s just say for the sake of the argument ONLY: He’s right. Now, notice the way he put together his sentence, even he says that the CELL is currently running at 1.15Ghz. So by the time the final 65nm CELL rolls along the line, the speed will probably increase.

[cpiasminc]

Hmmm... to get out 16 Teraflops in a single rack at 1.15 GHz means...

1.15 * 64 = 73.6 GFLOPS/ PE
16000 / 73.6 = 217.4... Let's just say 218 processors.
218 PEs (or CPUs, if you assume 1 PE per chip) in one rackmount _workstation_? Let's say 216 since that's the closest multiple of 4 if we're talking BBE processors. So that means 54 processors.

Uuuh-huh... realistic.

Well, either way, I'm still waiting for when they'll have actual PS3 models to see what the final results will be like. The CELL workstations they speak of are still horribly expensive, and the real units wouldn't be anywhere near 16 TFLOPS anyway, so I think their example is more for DCC buyers. The Cell workstations going out to game developers probably wouldn't be a big rack of blades. A *server* that is meant to service an entire development team, maybe, but not an individual workstation.

[Dralor]

There you go encouraging him again now he'll never leave. :mrgreen: Oh and by the way ha anyone found out the die size of the prototype yet.

[The_One]

There you go encouraging him again now he'll never leave. :mrgreen: Oh and by the way ha anyone found out the die size of the prototype yet. It's everywhere... 90nm.

[Dralor]

No that is the process it was made on I mean the actual die size as in square mm.

[xbdestroya]

Good point cpiasminc. That certainly makes me believe that the 16 + T-flops coming from 16 quad-core processors is the more likely scenario, and thus afirmation of the 4.6 Ghz speed.

Either that or they are using these workstations as an example of the Cell's scaling performance!



Hmmm... to get out 16 Teraflops in a single rack at 1.15 GHz means...

1.15 * 64 = 73.6 GFLOPS/ PE
16000 / 73.6 = 217.4... Let's just say 218 processors.
218 PEs (or CPUs, if you assume 1 PE per chip) in one rackmount _workstation_? Let's say 216 since that's the closest multiple of 4 if we're talking BBE processors. So that means 54 processors.

Uuuh-huh... realistic.

Well, either way, I'm still waiting for when they'll have actual PS3 models to see what the final results will be like. The CELL workstations they speak of are still horribly expensive, and the real units wouldn't be anywhere near 16 TFLOPS anyway, so I think their example is more for DCC buyers. The Cell workstations going out to game developers probably wouldn't be a big rack of blades. A *server* that is meant to service an entire development team, maybe, but not an individual workstation.

[The_One]

No that is the process it was made on I mean the actual die size as in square mm.
IBM plans to begin pilot production of Cell microprocessors at its 300mm wafer fabrication facility in East Fishkill, NY during the first half of 2005. There ya go.
Sourc: http://www.psinext.com/itex.php?iid=407

[PeanutButterMunky]

What the hell is this 16 Teraflop crap? IBM's fastest workstation they've developed recently runs around 5.6 Teraflops. But 16? What are you guys smoking? (it must be stong...pass it here please ;) )

[The_One]

What the hell is this 16 Teraflop crap? IBM's fastest workstation they've developed recently runs around 5.6 Teraflops. But 16? What are you guys smoking? (it must be stong...pass it here please ;) ) Crack. Here ya go.
No, seriously, check out the graphics discussion thread. I posted a link to the OFFICIAL Sony PDF file there.
Or if you're too lazy... Here's the link: http://www.scei.co.jp/corporate/release/pdf/041129be.pdf

[PeanutButterMunky]

^^^^^^

All I have to say is:

VVVVVVV
http://instagiber.net/smiliesdotcom/cwm/cwm/eek2.gif

Thanks for the enlightenment ;)

[The_One]

No probs, any time bro ;). You were refering to the link, and not to the crack... right :lol:?

[PeanutButterMunky]

A little of both ;) But mostly the link...

[cpiasminc]

It's everywhere... 90nm.
No that is the process it was made on I mean the actual die size as in square mm.
I figure this is a good chance for some obligatory useless math... :D

Say you have a die of 100 sq. mm... At that kind of die size, let's say you have a hypothetical passive cooler where the total thermal resistance from die to heatsink is 0.8 C/W. So that means that for 85 C, so that means 106.25 W would have to be consumed. Obviously, I'm assuming that for a die that size, a passive cooler would have to be pretty big.

Now, since the contact area will be significantly smaller for a 90-nmx90-nm die size... the transfer rate will go down proportionally. Since a nanometer is 1 millionth of a millimeter, our die area ratio is...

(9x10^(-5) * 9x10^(-5)) / 100 = 0.000000000081.

Assuming the contact patch is that many times smaller, the rate of transfer will be that much weaker...

0.8 / 0.000000000081 = 9876543209.8765 C/W.

Now obviously, there's a few interfaces at work here, and the contact between heatsink and slug will not be so small, but I'm assuming that when the die, which is the thing actually creating the heat is THAT small, the effects of other thermal interfaces is pretty negligible to the overall thermal resistance.

85 C / 9876543209.8765 C/W = 0.0000000086 W.

Whoo! 300 GFLOPS on a chip that's only 8100 sq. nm, and draws only 8.6 nanowatts. That's some magic silicon there.

Yes, I'm a freak. :P


EDIT :
IBM plans to begin pilot production of Cell microprocessors at its 300mm wafer fabrication facility in East Fishkill, NY during the first half of 2005.
Again, 300 mm is the wafer diameter. Meaning you have ~70685 sq mm of total area on a wafer on which chips are produced. 300 mm is valuable for increasing yield percentages because you can get more chips on 1 wafer, but it doesn't tell us anything about how big the chips themselves are.

Might as well throw in a 300 sq. mm case.

0.8/3 = 0.266666...
85 / 0.26666666666 = 318.75 W.

Now with only a 3:1 ratio of die area, the other thermal interfaces do have some significance, so that figure would probably only be accurate to within 15%. Let's assume 15% in the negative, which means 271 W. For Cell to eat up 271 W is hideous.

Of course, I'm still assuming a hypothetical passive cooler that maintains a resistance of 0.8 C/W on a 100 sq. mm die. For all I know, their cooling could have really bad thermal resistance around 2.5 C/W or something.

[The_One]

You're a freak indeed :P... Where did you learn all that crazy math? Good thing I'm not persuing a career in the Computer Science field :mrgreen:.

[kevindenoyette]

I don't get it.

[PeanutButterMunky]

Yes, I'm a freak.Yes...but a very SMART freak...;)

[The_One]

I don't get it. Neither do I... but just go with the flow :lol:.
I was never good with Math back in high school XD.

[Pistolero]

cpiasminc : Given the information granted -and owing to your freaking knowledge- what would be your first impressions concerning the Cell ?

[cpiasminc]

Where did you learn all that crazy math? Good thing I'm not persuing a career in the Computer Science field.
Actually, that was more of a mechanical engineering problem regarding heat transfer... But basic diffeq will tell you that any transfer problem will start off non-linear, but tend towards linearity as time approaches infiniti. For CPU-level heat production 20 minutes is effectively an infinite amount of time.
http://hyperphysics.phy-astr.gsu.edu/hbase/thermo/imgheat/hcon1.gif

I figured if time is infinite, Thot is 85 C and the only variable is Area, you can play a little bit and get thermal resistance (1/kappa) being linearly related to Area. And you just solve for Q.

cpiasminc : Given the information granted -and owing to your freaking knowledge- what would be your first impressions concerning the Cell ?
Well, as long as they have some halfway decent yields enough to show samples at 4.6 GHz or offer rack stations with total aggregate power of 16 TFLOPS, that suggests that the power consumption even at that high a clock speed is not that high.

I wouldn't expect practical performance *that* close to its theoretical limits, but higher theoretical limits give you higher practical limits either way. Because each APU is not inherently SMT, and that's up to the scheduling logic to determine, I think the average power consumption would be very low. I also think that a lot of the slower instructions and unnecessary instructions may be taken out. For instance, the coherency system seems to rest on a sort of check-out/check-in protocol, which renders fencing kind of useless. However, it could lead to a lot of read-write delays, which is why it would be very important to work on datablocks that are sufficiently small that they can fit inside the APU-local caches and software cell packets that carry them. Otherwise, I think the throughput would be god-awful... unless the scheduling logic would split up a large software cell into multiple cells that use the same instructions but access a different section of the datablock. But you can't really do that when there is large-offset co-dependency.

It'd be funny cause that could defy a lot of common logic. It actually suggests that when sorting large lists on a PS3, bubble sort could occasionally be faster than shell sort because of the far better spatial and temporal locality. :shock:

Well, at 1.3 V and PD-SOI... it doesn't necessarily say whether it's using strained silicon or not, but if IBM is making them, then SS is likely. SS will raise power consumption a bit because drive currents naturally increase. I'm thinking less than 50 W. Of course, I could be way off. I don't really know what the die size of that sample is, but each APU would be really small because its not full of all the branch prediction, register renaming, SMT, OOOE crap. And the PUs would probably shed some decode logic as well. The transistor cost of each APU would probably only be about 2 million transistors or so... maybe less. If that's the case, the die size would be tiny, not including the eDRAM, which doesn't really draw that much power itself, but it would change the die size enough to affect thermals... So I'm guessing a die size that's less than 80 sq. mm. Maybe even less than 65. EDIT : That size is assuming a single PE and 8 MB of eDRAM instead of the full 32.

[Dralor]

In other words yours saying heat and power consumption are probably the limiting factors and not die size. Though they could artificially inflate die size to reduce the amount of heat. Oh bubble sorts are great I just learned how to do a simple one in java. :)

[PeanutButterMunky]

Wasn't there an article in here about the PS3 cooling system? I don't remember wher I copied this from...but here you go:

"TOKYO--Enabling the shift towards "ubiquitous computing," Japan's Toshiba Corp. and Sony Corp. late Monday announced the world's first 65-nm CMOS process technology for embedded memories.

The process technology will enable single-chip devices, said to be one-fourth the size of current embedded chips in the market. The process also enables a 30-nm transistor with the world's fastest switching speeds, as well as the world's smallest cell for embedded DRAM and SRAM.

Toshiba and Sony have utilized 65-nm process to fabricate an embedded DRAM with a cell size of 0.11um2, which will enable a 256-megabit memory to be integrated on a single chip. It also fabricated the world's smallest embedded SRAM cell of only 0.6um2.

The technology will bring the market towards what the companies call "ubiquitous computing," that is, total connectivity at all times, according to Toshiba and Sony......In a release issued late Monday, the companies described some of the details of the process, including the development of a high-performance transistor with a 30-nm gate length.

Fabricated with 193-nm lithography tools and phase-shift photomasks, the transistor is said to have switching speeds of 0.72-ps for NMOSFET and 1.41-ps for PMOSFET at 0.85-Volt (Ioff=100nA/um).

The transistor makes use of a nitrogen concentration plasma nitrided, oxide-gate dielectrics to suppress gate leakage current. This optimization reduces leakage current approximately 50 times more efficiently than conventional silicon dioxide film and allows formation of an oxide with an effective thickness of only 1-nm.

To reduce wiring propagation delay and power dissipation, a low-k dielectric material is adopted. The target effective dielectric constant of the interlayer dielectric is around 2.7.

Seems pretty freaking cool to me...

[cpiasminc]

In other words yours saying heat and power consumption are probably the limiting factors and not die size. Though they could artificially inflate die size to reduce the amount of heat.
Yeah... You could save a little bit on whole system cooling by using piezo transformers in your PSU (and piezo transformers are more efficient anyway, so why not?). You can save on cooling by having twice the PEs at a much lower clock speed. I think 2 PEs sounds very doable... and 4 is *possible* but I doubt you could get very high volume on it.

Artificially increasing die size by an inefficient layout may be workable, but I don't know how much real improvement you might see. I'm impressed enough that they went beyond the patent goals on an older process node, but I'm still going to want to wait and see how this translates over to the real PS3.

Say at 65-nm, they're able to get down to 0.85 Vcc -- That should bring you down to about 42.75% of the original power consumption. That would likely put it well into the CPU consumption range of a thin+light laptop. Chances are that the die size would be down to about 60% of the 90nm version, so you'd have a net drop in temperature. You'd still need a few system fans to keep the darn thing cool, though. No matter how you slice it, 85C is indicative of bad tidings when you start debating this unit inside a console (unless this was running inside some sort of environment where the ambient temperature was 60C, in which case you have entirely different problems)... Say the ambient case temp was 35 C... that would probably bring the temperature down to about 71 C at 65-nm using the same cooler. That's still bad.

Maybe if it's really a major concern, water cooling is possible. I don't think Sony would let it come to that, but I have some faith that they might be able to pull it off a little better than Sega did with Dreamcast. Without the need for a "shake well before using" label :wink:.

I would love it if they could pull off a 4.8 GHz CELL CPU with 2 PEs per chip with a 2.4 GHz 4 PE GPU... Well, I'd love it if I could afford a BMW to go with my PS3... both are about equally likely.

[gryphon]

i by no means am thinking of buying the next xblock, but i was wondering if someone could enlighten me about the xbox2's processor. i heard that it was going to be PowerPC derived and that it may be multi-core, but it sounds like the Cell is similar to this as well, so I would like to know what differentiates these two processors?...any explanation would be greatly appreciated

[stanDarsh]

Cpiasminc, I think you should see (if you havent already) the size of the heat sink inside the first PS2 model (SCPH-10000). It is damn huge! :shock:

Sony probably has a similar problem this time around as well, so we might see some rather large heat sinks again! :lol:

[uFx Productions]

i by no means am thinking of buying the next xblock, but i was wondering if someone could enlighten me about the xbox2's processor. i heard that it was going to be PowerPC derived and that it may be multi-core, but it sounds like the Cell is similar to this as well, so I would like to know what differentiates these two processors?...any explanation would be greatly appreciated
i agree :wink:

[Dralor]

Actually, it is possible that it would only be 44.44% or 4/9 of 90nm die size but thats the best case scenario. Oh and if you put four PE's on a die and give a 5 sq. mm buffer zone between each core( the number maybe larger or smaller it is just one that sounded nice) you would a size of 280 sq mm. on a 90nm die using Cp's 65 sq. mm per PE.

[xbdestroya]

i by no means am thinking of buying the next xblock, but i was wondering if someone could enlighten me about the xbox2's processor. i heard that it was going to be PowerPC derived and that it may be multi-core, but it sounds like the Cell is similar to this as well, so I would like to know what differentiates these two processors?...any explanation would be greatly appreciated
i agree :wink:

I think it's safe to say that the XBox chip is just a tweaked Power 5; multi-core in design. (not that a Power 5 is some joke of a chip) They're saying a CPU with three cores, each multi-thread capable. I think although the idea behind what they're crafting for M$ and what they've made together with Sony are similar, the Cell is differentiated in it's versatility/'soft-cell' abilities - not to mention it's designed entirely for massively parallel operating environments and chip-to-chip communication. (of course Power 5 is pretty scalable too)

I think it's actually the 'soft-cell' stuff that's going to have us waiting to see what the 'real' differences are. I'm sure more will leak between now and early Feb, so here's hoping for that. When you think about how long so many of us have been waiting for exactly the type of information we're beginning to receive, two+ more months doesn't seem all that bad. You can tell immediately the parts of this chip that have their origins inthe Power design, what I'm more interested in is what tweaks to design Sony and Toshiba pushed for, and I don't think we've really seen all of that yet. 8)

Ultimately the Power 5 is a server chip geared to other functions, in this case gaming, and the Cell chip is a content creation chip geared towards 'whatever' it seems. I'll be interested if it's at all viable for desktop use down the line, or how it performs at x86 emulation. I don't know enough about chip architecture to make any inferences. But I think it's safe to say that when comparing the XBox chip to the Cell chip, there will be some substantial differences.

[Domination]

Hmmm... to get out 16 Teraflops in a single rack at 1.15 GHz means...

1.15 * 64 = 73.6 GFLOPS/ PE
16000 / 73.6 = 217.4... Let's just say 218 processors.
218 PEs (or CPUs, if you assume 1 PE per chip) in one rackmount _workstation_? Let's say 216 since that's the closest multiple of 4 if we're talking BBE processors. So that means 54 processors.

Uuuh-huh... realistic.

Well, either way, I'm still waiting for when they'll have actual PS3 models to see what the final results will be like. The CELL workstations they speak of are still horribly expensive, and the real units wouldn't be anywhere near 16 TFLOPS anyway, so I think their example is more for DCC buyers. The Cell workstations going out to game developers probably wouldn't be a big rack of blades. A *server* that is meant to service an entire development team, maybe, but not an individual workstation.

I believe his original claims were that the Cell (as a final acrchitecture) will run below this mark, which still proves to be untrue if we are only talking about the 90nm architecture. Yet, it already exceeds those predictions. It looks to me like Cell will at least hit the 2GHz mark when it's all over. So, even if he was right, he is still wrong. On Febuary 2nd, we will know just how wrong he is.

[rev>thanu]

2ghz is the least i expect from all this 2.6 - 3.0 ghz i fell is a more reasonable number.

[Domination]

2ghz is the least i expect from all this 2.6 - 3.0 ghz i fell is a more reasonable number.

That was the reason I said at least 2GHz.

[gryphon]

im wondering if they are going to have very low powered versions of the cell driving cellular phones and PDAs, because i think i saw on some patent about the cell that they were thinking of putting the cell in home appliances and PDAs, and i cant imagine a slim PDA having room for a large heat-sink.

[xbdestroya]

It'll be in TV's and stuff to begin with I imagine, maybe the newer version PSP in a slower/cooler form. PDA's if it (the Cell) ends up running Palm, Linux, and/or Windows in a decent way and in a size/speed grade that doesn't need much cooling. From there shoving it into SonyEricsson phones I'm sure is a natural next step. It'll end up being anywhere and everywhere Sony and Toshiba can put it, of that you can be sure. Which makes me wonder, in it's simplest incarnation, how small and cheap and cool can a Cell chip be?

[cpiasminc]

Actually, it is possible that it would only be 44.44% or 4/9 of 90nm die size but thats the best case scenario. Oh and if you put four PE's on a die and give a 5 sq. mm buffer zone between each core( the number maybe larger or smaller it is just one that sounded nice) you would a size of 280 sq mm. on a 90nm die using Cp's 65 sq. mm per PE.
Let's see... 280 sq. mm die, assuming that the die is approximately square in shape (which is what you want anyway), that means about 16.7 mm length to a side.

Now having a 300mm wafer means about 706 sq. cm of area to put dice on. Now with a 16.7 mm length square that makes up a 2.8 sq. cm die, you have some edge-effect loss. At the widest point, you can get 17 dice wide on the circle. Fortunately, 17 being an odd number that works out in both axes, and you can get a die exactly centered on the wafer. That brings down the usable wafer area to about 564.8 sq. cm. Divide by 2.8 sq. cm means you have about ~201 possible die candidates on a 300mm wafer. A little bit of error due to rounding, but 201 sounds about right. About half of those would actually be *good* dice. So 100 chips probably come out of a wafer with 4 PEs. Not bad, actually.

At that rate, the average cost of production per chip can get down to a lower limit (that is, after a really long time) of about $12 per chip. Initial costs would probably be around 5 or 6 times that.

[Dralor]

Oh was your initial estiment on size estimate on 90nm or 65nm because if it was on 90nm you can potentially fit 9 PE's on the same die space if everthing goes perfect but you would probably end up with 8 PE's on a slightly smaller die. I could tell you how small if I knew how much die shrinkage they were able to achieve.

[__Deadmeat]

xbdestroya
I think it's safe to say that the XBox chip is just a tweaked Power 5
Nope, just a bin sorted PowerPC 970MP. Apple gets the faster chips, while MS gets the remainder for less.

gryphon
im wondering if they are going to have very low powered versions of the cell driving cellular phones and PDAs,
There won't be. Toshiba already confirmed that CELL burned too much power to be used in portables, and they would push MeP in portable/embeded market instead.

cpiasminc

Let's see... 280 sq. mm die
Unlikely. James Kahle already gave the CELL die layout in his patent filings; 9 APUs get 50% of the die, the remainder goes for Power core and the network interface.

Assume that James Kahle put a Power4 core(afterall, James Kahle was the chief architect of Power4 and this is where he says he started from), you are looking at a CPU die size of ~45 mm2 on IBM 90nm process. Triple that for APUs and other stuffs and you have an overall die size of around 150 mm^2. Compare this to 130 mm^2 die size of Antares for Xbox Next.

BTW, A Bonus for you.

CELL's 4.8 Ghz APU SRAM (http://www.eet.com/semi/news/showArticle.jhtml?articleId=54200580&pgno=2)

The processing element's DMA controller is so designed, it appears, that any chip in a system can access any bank of DRAM in the cell through a band-switching arrangement. This would make all the processing resources appear to be a single pool under control of the system software.

Giving scale to the performance targets for the project, one of the ISSCC papers puts the performance of the streaming-processor SRAM at 4.8 GHz.
I told you. CELL's SRAM runs at 4.6 Ghz to synchronize with XDR RAM; but the APU themselves runs at 1.15 Ghz as you had seen with your own eyes. Your eyes didn't deceive you.

4.6 Ghz * 4 Byte = 1.15 Ghz * 16 Byte

[cpiasminc]

Let's see... 280 sq. mm die
Unlikely. James Kahle already gave the CELL die layout in his patent filings; 9 APUs get 50% of the die, the remainder goes for Power core and the network interface.
Dude... calm down. I didn't say you'd necessarily have a 280 sq. mm die with 4 PEs. I started with Dralor's figure and carried on from there with some volume calculations.

Actually, it doesn't really surprise me that the CELL layout should have such a large percentage of space taken up by logic. The cores are extremely simple, and you don't have these immense caches mandated by the common superscalar processors. The only real space hog (that is, low density component) would be the eDRAM, and Toshiba makes the smallest eDRAMs ever.

Assume that James Kahle put a Power4 core(afterall, James Kahle was the chief architect of Power4 and this is where he says he started from), you are looking at a CPU die size of ~45 mm2 on IBM 90nm process. Triple that for APUs and other stuffs and you have an overall die size of around 150 mm^2. Compare this to 130 mm^2 die size of Antares for Xbox Next.
Now that I really doubt. The thing is that the APU pipelines are far simpler than any Power4 SIMD core. In-order, no branch prediction, no SMT, single-issue, no register file duplicates, maybe even no forwarding. Moreover, the Power core that makes up the PU wouldn't have any Altivec pipe (that's what the APUs are for), so you end up having that much less decode logic. And in fact, the fact that it IS in-order, single-issue means it's many, many times easier to get a high clock speed because about the only pipeline logic you've got is execution, and decoding.

In a big superscalar monster like Power4, only about 15-25% of the logic portion is actually execution+decoding+register and so on... I should say -- the truly essential portions of the pipeline and not the performance functions. So those APUs (of which you have 8, not nine), are only a few million transistors a piece, and have very little decode logic because they only have to execute the Altivec/GMX subset of instructions.

I also expect that because it's a console, you might just deprecate a lot of effectively meaningless instructions, so the PU gets a little simpler still. I'd also expect that IF the APUs themselves run at 4.8 GHz or something, the Power core (PU) that schedules to them would at best, run at half that clock speed.

Oh was your initial estiment on size estimate on 90nm or 65nm
Actually, when you include eDRAM, I was thinking 65 sq. mm at 65-nm node. I was originally thinking 65-80 for 90nm without the eDRAM, but after reading that following news quote regarding Toshiba's eDRAM at 65-nm node having a 110 nm cell size, I would now have to think around 65-70 sq. mm including eDRAM at 65-nm node.

[julps31]

So maybe its not tottally out of the question for the Cell to have a high clock rate. As long as they can keep the power consumption and heat down we will have one monster of a processor on our hands. Now the GPU is a different story.

[nAo]

So maybe its not tottally out of the question for the Cell to have a high clock rate. As long as they can keep the power consumption and heat down we will have one monster of a processor on our hands. Now the GPU is a different story.
DOn't listen to Deadmeat :) If STI have stated in their press releaser that a fisrt version CELL CPU has a 4.6 ghz clock..that's enough for me :)

[oxygenuk]

Judging by this info which is very exciting, i believve you would all agree with me 8) , could any of ya guess how many times more powerful grpahical wise than itll be from todays comps? todays comps are about 3.6 ghz i believe

[The_One]

Judging by this info which is very exciting, i believve you would all agree with me 8) , could any of ya guess how many times more powerful grpahical wise than itll be from todays comps? todays comps are about 3.6 ghz i believe The graphical processor and the Hz of the GPU are two different story... You can't just say that the CELL will be able to produce better graphics ONLY on the Hertz.
Proof:
When PS2 was released, I believe the computer at that time were around 733Mhz~. Yet the PS2 was only 295Mhz, did the computer games have better graphics or the PS2? There you go.

On a more technical level, the graphical performance actually depends on the GPU, not as much on the CPU. So the better the GPU, the better the graphics you can pull off (as well as sufficient RAM and whatnot... but that's another story).

[oxygenuk]

ah right. gpu and ram info havent been released yet, damn :twisted:

[mmaatt78]

just a question: 4,66 mhz isn't a bit small compared with what Sony promised us for the new play3...
I mean: the actual emotion engine is about 233 mhz, the 4,66 ghz of the new one is about 20 times the actual emotion engine....
...reading the rumors on the internet my expectation for the new chip was of something of really powerful...something at least 100 times bigger than the actual emotion engine and bigger than any other actual processor as the latest Pentium ...
...I know that what I wrote sounds stupid, and I'm not a computer technician or engineering for judging or saying thing about the features of a machine...it's just a consideration...
...my expetation is so big, expecially now after San Andreas, I wonder what kind of games we will play in 4-5 years
ciao!

[__Deadmeat]

Now that I really doubt. The thing is that the APU pipelines are far simpler than any Power4 SIMD core.
The APUs are full blown PowerPC processors themselves(Dubbed PowerPC 350), available to 3rd parties as synthesizable core. This is why I know IBM was pushing the CELL to its limit at 1.15 Ghz, we are talking about a ARM10/11-level embedded scalar PowerPC processor here.

What would you do if someone claimed to have an ARM11 processor running at 4.6 Ghz? You would say "What are you smoking?".
What would you do if someone claimed to have a PPC440 class processor running at 4.6 Ghz? You would say "What are you smoking?" again.

I'd also expect that IF the APUs themselves run at 4.8 GHz or something
No it doesn't. You and I know it, and you have seen it with your own eyes unlike me.

So those APUs (of which you have 8, not nine), are only a few million transistors a piece, and have very little decode logic because they only have to execute the Altivec/GMX subset of instructions.
According to Hiroshige Goto, APU implements a full PowerPC instruction set and you can use it as such.

If STI have stated in their press releaser that a fisrt version CELL CPU has a 4.6 ghz clock
They didn't. Go and search all the press releases looking for 4.6 Ghz; you won't find one.

just a question: 1.15 Ghz isn't a bit small compared with what Sony promised us for the new play3...
That was before the clockspeed scaling hit the brickwall and overheating problem surfaced.

Idei(Sony CEO) promised a chip UPTO 10 times as powerful as existing processors in his interviews and they are set to deliver that goal, with CELL peaking out at 72 GFLOPS next to 6~7 GFLOPS delivered by today's Pentium4s.

But was teraflop ever possible for a single chip? Kutaragi Ken never promised that, what he meant was reaching 2 TFLOPS in a rack configuration.

[nAo]

From the ISSCC Advance Program (http://www.isscc.org/isscc/2005/ap/ISSCC2005AdvanceProgram.pdf):

A 4.8GHz Fully Pipelined Embedded SRAM IN the
Streaming Processor of a CELL Processor


A 6-stage fully pipelined embedded SRAM is implemented in a 90nm SOI
technology. The array uses a conventional 6-transistor memory cell and
sense amplifier to achieve the cycle time while minimizing the impact of
device variation. A sum-addressed pre-decoder allows partial activation for
power savings.

From several patents we know each APU has a local SRAM (128kb).
This local SRAM is NOT shared between APUS..it just feed one APU.
So..there is no reason to make a sram running so fast (it's fully pipelined, so I expect 1Read/1Write per clock cycle troughtput) if the APU cannot consume the data it produces. I don't believe the local SRAM has not a data bus as wide as a single APU register (128 bits), otherwise it would have been much more simple to design a much slower sram with a wider data bus.

ciao,
Marco

p.s. I almost feel sorry for Deadmeat :)

[Domination]

Idei(Sony CEO) promised a chip UPTO 10 times as powerful as existing processors in his interviews and they are set to deliver that goal, with CELL peaking out at 72 GFLOPS next to 6~7 GFLOPS delivered by today's Pentium4s.

OMG! I could find the quote for this and it still wouldn't make any difference.

[Dralor]

Don't even bother answering his rant.

(cpiasminc check your pm much :P )

[xbdestroya]

I'm going to go with nAo and cpiasminc on their assesments of the situation here. :wink: I am aware of IBM's program to offer customizable PPC chips, but I simply will not believe something that large/complex is what forms the base of each APU.

As for the Antares chip from IBM, I thought it wasn't known fully yet whether it derives more from Power 4 or Power 5; got the impression it was kind of an in-between kind of thing. Anyone have any insight into this?

[Pistolero]

"with CELL peaking out at 72 GFLOPS next to 6~7 GFLOPS delivered by today's Pentium4s"

Sorry to unveil my dark side but this is the dumbest sentence I have ever read ! Years and years of research, Billions of dollars allocated and a previous goal of 1 T Flop to end up with that "much" potential ? It is a mere question of logic and reason...

[kevindenoyette]

well i dunno. the cell is supposed to be the same leap from the ps2 as the ps2 was to the ps1, so that's a 20x power increase. so, 120 gflops or bust.

[cpiasminc]

Don't even bother answering his rant.
(cpiasminc check your pm much :P)
Actually, I did respond... it's just that I was still the last poster in the thread at the time, so I edited that same post (http://www.playstation3insider.com/forums/viewtopic.php?p=82620&highlight=&sid=e97149f5973a6 b9f731403e16a6c2f77#82620)...

The thing that mystifies me is that for some reason, Deadmeat thinks that each of the APUs is a full-blown superscalar core in itself ... Which completely defeats the entire purpose of CELL in the first place. And a few older responses sound as if he thinks CELL is one particular chip rather than a design philosophy. The whole point of 3rd party-synthesizable APUs was not that it be a common design, but that 3rd parties are allowed to use their _own_ designs. What the hell rock has that creature been under?

On the ace's hardware forums, I see a guy at the opposite extreme. An anti-Xbox zealot, who's a lot more stupid and shady than Deadmeat ever has been. And he similarly changes his name every time he's condemned for his limitless stupidity, although occasionally a little more imaginative. I believe he calls himself REYES now. Kind of disgraces the name. Oh well, I used to think 3735928559 was funny, but deadmeat disgraces the number just for being _similar_.

[The_One]

...reading the rumors on the internet my expectation for the new chip was of something of really powerful...something at least 100 times bigger than the actual emotion engine and bigger than any other actual processor as the latest Pentium ... 100 times bigger physically? That's not possible... considering how the EE is quite big (it contains the CPU and the GPU... all in one :D). If you meant power-wise... 1TFLOp/s per CELL is more then 100 times "bigger" then the current EE, which process at 6.2GFLOp/s.

[Omega Blue]

just a question: 4,66 mhz isn't a bit small compared with what Sony promised us for the new play3...
I mean: the actual emotion engine is about 233 mhz, the 4,66 ghz of the new one is about 20 times the actual emotion engine....
...reading the rumors on the internet my expectation for the new chip was of something of really powerful...something at least 100 times bigger than the actual emotion engine and bigger than any other actual processor as the latest Pentium ...
...I know that what I wrote sounds stupid, and I'm not a computer technician or engineering for judging or saying thing about the features of a machine...it's just a consideration...
...my expetation is so big, expecially now after San Andreas, I wonder what kind of games we will play in 4-5 years
ciao!

you have no idea what your talking about...

...exit through the rear please...and please, dont come again.

[Nfactor]

Looks like Deadmeat can't read.Plus it looks like PS3 will be a little more powerful then I think anyone had envisioned it being. I'm sure Toshiba and IBM and Sony would have alot to say about your delluded logic. Plus a good tip to remember is, Read,Re-Read, and Read over again, actual facts that is. Wait till the ISSCC reports comes pouring in from San Fransisco, Deadmeat won't be able to come here again, spouting his obsurd insecurities in technology and chip development, great hobby being a moron on a message board eh, Deadmeat? LOL

[cpiasminc]

Wait till the ISSCC reports comes pouring in from San Fransisco, Deadmeat won't be able to come here again, spouting his obsurd insecurities in technology and chip development, great hobby being a moron on a message board eh, Deadmeat?
What makes you think that? I don't think Deadmeat would take a single thing said in the reports to heart. He'll find some other obfuscated interpretation that can only be explained by taking two to three little pieces out of context and ignoring the rest.

Not so different from when I started off a sentence saying "I'd also expect that IF the APUs themselves run at 4.8 GHz..." and making sure to put the word "IF" in all caps, and continuing on with the sentence beyond that, but he takes just that portion of the sentence and says "No it doesn't". Not only did he ignore part of a sentence, but he ignored an all caps word within the clause he supposedly didn't ignore. Given that, I think that even after PS3 comes out and is rated at several hundred GFLOPs or something, you could never shut up a guy like that.

[xbdestroya]

To mmaatt78:

I don't think you should leave and not come back, as some others might suggest. :wink: After all, you're here to learn about the Cell and Playstation, right? If there weren't any questions to answer or things to speculate on, this forum would be pretty dead in between news stories.

Anyway you're looking at things the wrong way. That's just Intel b*llsh*t, this whole 'speed is everything' thing. (so by the way get AMD for your next PC!) Cell's not going to be more or less powerful than anything just because it's faster than this or that chip. It's a whole new architecture, or way of processing information. In some things it will even be worse. But for what it's meant to do, Cell's looking pretty promising. I'm sure Cell is going to be a LOT closer to being x100 more powerful than the Emotion Engine rather than x20. But what a system can do is dependent on a number of things beyond the chip itself.

Anyway we'll know more in February.

If you have a lot of time to kill and want to learn more about it, just spend some time reading through some of the threads on this site, and you should learn quite a bit.

[rev>thanu]

Given that, I think that even after PS3 comes out and is rated at several hundred GFLOPs or something, you could never shut up a guy like that.

LOL that's so true. i mean deadmeat is just brain dead. He comes from a cave deep in Afghanistan or maybe he comes from bizzaro world were everything is backwards.

[__Deadmeat]

Nao
it just feed one APU. So..there is no reason to make a sram running so fast
To synchronize with XDR, of course. To move massive amount of data in and out of System RAM, it is extremely critical that SRAM sychronize with XDR for the maximum efficiency.

cpiasminc
Deadmeat thinks that each of the APUs is a full-blown superscalar core in itself ...
So you don't bother to read my post....

]we are talking about a ARM10/11-level embedded scalar PowerPC processor here.
An APU is a full-blown PowerPC core capable of running its OS, hence the reference to onchip multi-OS capability. Scalar PowerPC? Yes they do exist, PPC602 was one, PPC405LP in GameCube is one, and PPC350 inside CELL is one too.

Not only did he ignore part of a sentence
No, I didn't ignore it, I have certain piece of information you don't have so I conveyed it to you.

I think that even after PS3 comes out and is rated at several hundred GFLOPs or something, you could never shut up a guy like that.
Actually, I would shut up and not come back if that was the case.

[__Deadmeat]

http://home.businesswire.com/portal/site/google/index.jsp?ndmViewId=news_view&newsId=2004120100600 3&newsLang=en

December 01, 2004 08:30 PM US Eastern Timezone

Momentum -- For Power Architecture Technology; IBM to Add 150 Design Engineers in China; Intros New Chips; Signs Deals With Local Firms

BEIJING--(BUSINESS WIRE)--Dec. 2, 2004--A community for open standards for chips and systems that use Power microprocessors is growing in China, helping the technology find its way into a longer list of consumer, networking and computer electronics.

At an event here today called PowerEverywhere Beijing, attended by numerous high-ranking government and university officials, regional customers, reporters and industry analysts, IBM and many other companies outlined their vision for a development community for this microprocessor, including the formation of Power.org.

Power.org is a community meant to promote advances in Power Architecture technology and make those advances available to a wider community, accelerating open standards for this customizable technology. It was one of several important announcements showing momentum that included:

-- Shanghai Belling said it intends to license Power Architecture technology to create advanced chips;

-- Culturecom is testing a new "tax organizer" system driven by Power processors;

-- Peking University intends to launch a remote access "Linux on Power" initiative;

-- IBM will grow the number of engineers supporting its Power Architecture Technology Center in Shanghai by 150 people;

-- the company has shipped more than one million IBM Power 970 FX chips;

-- new Linux development kits for the IBM Power 750 FX and GX from TimeSys;

-- unveiled the details of a pioneering technique to build Power chips known as "wet" immersion lithography while adding new low-power "synthesizable" processor cores to its offerings;

-- and detailed the Power Architecture technology in the processor code named Cell.

"IBM is building a soup-to-nuts strategy of being a focal point of technology development for the world's chip suppliers at the baseline and following this through to the market with its design capability and partnerships with other companies. At the same time, it is opening up to make those partnerships viable," said Dan Hutcheson, president, VLSI Research.

Customizing for Local Markets

In today's world -- where innovation on demand is a must -- consumers are surrounded by intelligent devices, such as cars, communication gear, video game stations, MP3 players, computers, network systems, and more. Many of these are driven by Power Architecture technology, and many more might be introduced soon given the technology's flexibility, recent breakthroughs, and greater acceptance by companies in China.

For instance, Shanghai Belling, China's largest semiconductor company, said today it intends to license Power Architecture technology so it can design and manufacture advanced chips for a host of future consumer devices, while Culturecom has introduced a unique kiosk-like system called a tax organizer, now being piloted in several Chinese villages. The organizer helps rural citizens understand a providence's tax structure and how to pay taxes, and it helps the government keep better track of them.

The university setting isn't a stranger to the milestones and accessibility of Power technology, either.

Peking University says it will launch a no cost Internet access pilot program so developers can access Power-driven servers, making it easier for them to develop, port and test "open source" applications. "This also will enhance the level of excellence in undergraduate and graduate engineering programs," said Professor LIN Jianhua, chief vice president of the university.

Million Milestone, Adding 150 Engineers

Chips based on Power technology have been shipped in the multiple millions worldwide, but this week one of its more recent entries, the IBM Power 970 FX, which the firm Semiconductor Insights gave an award to for its new design and technology innovation, reached a new milestone, with more than one million of the chips shipped.

And given its expanded use, with the heightened interest in Power technology in a variety of industry segments, IBM, which designs and manufactures the chips, said it will expand its Power Architecture Technology Center in Shanghai, operated by IBM Engineering & Technology Services, to help clients create their own product designs using the technology. IBM expects support for this center could reach 150 people during the next 18 to 24 months. This would occur through a significant increase in IBM staffing as well as through teaming with local companies that provide engineering skills.

In a related product development, TimeSys, headquartered in Pittsburgh, PA, announced the availability of its TimeStorm Linux Development Kits for IBM PowerPC 750 FX and GX. Thousands of embedded Linux developers worldwide from a range of industries have chosen TimeSys solutions to streamline the development, customization and validation of homegrown or commercial Linux-based embedded systems.

A First in Wet Manufacturing

Innovation in processes used to make chips contributes to IBM's leadership in the area. Dr. Bernard Meyerson, chief technologist, IBM Systems & Technology Group, revealed new details of its pioneering use of immersion lithography.

IBM is the first company to successfully employ this "wet" process to produce commercial microprocessors. These chips, based on IBM's Power architecture, were literally patterned underwater, an industry first.

Using light to pattern chip features in air is reaching the point where one cannot consistently make such features small enough, he explained. The wavelength of light used for patterning chips in a process called lithography is now actually far larger than the features one is making, greatly limiting future progress. Working in a liquid such as water, light can be "bent" more efficiently than in air, enabling it to be directed with greater precision, in theory aiding greatly in chip manufacture. In practice, however, the most fundamental question remained, would challenges due to working "underwater" prevent one from building products with this technique. IBM's successful manufacture of commercial Power microprocessors using immersion has dramatically increased confidence in this new technique's future.

"This advancement holds great promise for continuing progress in chip manufacturing technology well into the future," Dr. Meyerson told the audience.

IBM also announced the addition of two "synthesizable" processor cores, meaning they are easier to manufacture at foundries other than IBM's. They are the IBM PowerPC 440S and the IBM PowerPC 405S, available this month and expected in the first quarter of next year, respectively. A third synthesizable processor core, the IBM PowerPC 450, targeted for the networking and communications segments, is expected to be available in 2006.

Support From Venture Capital Community

Power Architecture technology has drawn the interest of venture capital firms, too. "Venture capital firms have invested in telecommunications, semiconductors and consumer electronics. Power.org can help companies in these segments develop new customers and generate new revenue from their investments in Power," said Robert Jelski, global head of electronics investments for the venture capital company, 3i.

Breakthrough with Toshiba, Sony

This drumbeat of success for the Power Architecture technology -- found in products ranging from game systems to blades and from desktops to supercomputers -- came only days after one of the more significant announcements in the history of this customizable technology, that of a breakthrough related to the microprocessor known under its code name, Cell.

Sony Group, IBM and Toshiba Corporation, working together on this revolutionary technology, revealed the first technical details of the chip, which is based on Power and will accommodate Linux as well as other operating systems. The companies have invested more than $400 million in this project. Because it is Power technology it can be easily customized for leading-edge performance, low power consumption and advanced function.

PowerEverywhere Beijing was part of an ongoing initiative to enable more companies, universities and even individual developers to use the Power Architecture technology, to innovate on it, and to share ideas in product design.

The model of Power.org will bring more strength to the architecture, because more design and software tools to develop devices using the Power instruction set will be made available, while more developers will have a place to meet, connect, collaborate and innovate on consistent interfaces. This should result in the development of more function-specific devices and systems, lower costs and improve time to market.
1. So IBM makes it "official"; CELL is just a customized POWER processor.
2. There is no aircooled POWER processor that clocks above 2.0 Ghz now. You need a liquid cooler to go 2.5 Ghz. CELL was not liquid-cooled.
3. CELL APU is PowerPC 450, not 350 as previously reported. My apologies.

[mmaatt78]

just a question: 4,66 mhz isn't a bit small compared with what Sony promised us for the new play3...
I mean: the actual emotion engine is about 233 mhz, the 4,66 ghz of the new one is about 20 times the actual emotion engine....
...reading the rumors on the internet my expectation for the new chip was of something of really powerful...something at least 100 times bigger than the actual emotion engine and bigger than any other actual processor as the latest Pentium ...
...I know that what I wrote sounds stupid, and I'm not a computer technician or engineering for judging or saying thing about the features of a machine...it's just a consideration...
...my expetation is so big, expecially now after San Andreas, I wonder what kind of games we will play in 4-5 years
ciao!

you have no idea what your talking about...

...exit through the rear please...and please, dont come again.


I don't want to be too rude becuse this's a public forum...just 2 words: fuck you!!!

[mmaatt78]

To mmaatt78:

I don't think you should leave and not come back, as some others might suggest. :wink: After all, you're here to learn about the Cell and Playstation, right? If there weren't any questions to answer or things to speculate on, this forum would be pretty dead in between news stories.

Anyway you're looking at things the wrong way. That's just Intel b*llsh*t, this whole 'speed is everything' thing. (so by the way get AMD for your next PC!) Cell's not going to be more or less powerful than anything just because it's faster than this or that chip. It's a whole new architecture, or way of processing information. In some things it will even be worse. But for what it's meant to do, Cell's looking pretty promising. I'm sure Cell is going to be a LOT closer to being x100 more powerful than the Emotion Engine rather than x20. But what a system can do is dependent on a number of things beyond the chip itself.

Anyway we'll know more in February.

If you have a lot of time to kill and want to learn more about it, just spend some time reading through some of the threads on this site, and you should learn quite a bit.

Thank you very much for the explication xbdestroya!! :wink:

[Nfactor]

http://home.businesswire.com/portal/site/google/index.jsp?ndmViewId=news_view&newsId=2004120100600 3&newsLang=en

December 01, 2004 08:30 PM US Eastern Timezone

Momentum -- For Power Architecture Technology; IBM to Add 150 Design Engineers in China; Intros New Chips; Signs Deals With Local Firms

BEIJING--(BUSINESS WIRE)--Dec. 2, 2004--A community for open standards for chips and systems that use Power microprocessors is growing in China, helping the technology find its way into a longer list of consumer, networking and computer electronics.

At an event here today called PowerEverywhere Beijing, attended by numerous high-ranking government and university officials, regional customers, reporters and industry analysts, IBM and many other companies outlined their vision for a development community for this microprocessor, including the formation of Power.org.

Power.org is a community meant to promote advances in Power Architecture technology and make those advances available to a wider community, accelerating open standards for this customizable technology. It was one of several important announcements showing momentum that included:

-- Shanghai Belling said it intends to license Power Architecture technology to create advanced chips;

-- Culturecom is testing a new "tax organizer" system driven by Power processors;

-- Peking University intends to launch a remote access "Linux on Power" initiative;

-- IBM will grow the number of engineers supporting its Power Architecture Technology Center in Shanghai by 150 people;

-- the company has shipped more than one million IBM Power 970 FX chips;

-- new Linux development kits for the IBM Power 750 FX and GX from TimeSys;

-- unveiled the details of a pioneering technique to build Power chips known as "wet" immersion lithography while adding new low-power "synthesizable" processor cores to its offerings;

-- and detailed the Power Architecture technology in the processor code named Cell.

"IBM is building a soup-to-nuts strategy of being a focal point of technology development for the world's chip suppliers at the baseline and following this through to the market with its design capability and partnerships with other companies. At the same time, it is opening up to make those partnerships viable," said Dan Hutcheson, president, VLSI Research.

Customizing for Local Markets

In today's world -- where innovation on demand is a must -- consumers are surrounded by intelligent devices, such as cars, communication gear, video game stations, MP3 players, computers, network systems, and more. Many of these are driven by Power Architecture technology, and many more might be introduced soon given the technology's flexibility, recent breakthroughs, and greater acceptance by companies in China.

For instance, Shanghai Belling, China's largest semiconductor company, said today it intends to license Power Architecture technology so it can design and manufacture advanced chips for a host of future consumer devices, while Culturecom has introduced a unique kiosk-like system called a tax organizer, now being piloted in several Chinese villages. The organizer helps rural citizens understand a providence's tax structure and how to pay taxes, and it helps the government keep better track of them.

The university setting isn't a stranger to the milestones and accessibility of Power technology, either.

Peking University says it will launch a no cost Internet access pilot program so developers can access Power-driven servers, making it easier for them to develop, port and test "open source" applications. "This also will enhance the level of excellence in undergraduate and graduate engineering programs," said Professor LIN Jianhua, chief vice president of the university.

Million Milestone, Adding 150 Engineers

Chips based on Power technology have been shipped in the multiple millions worldwide, but this week one of its more recent entries, the IBM Power 970 FX, which the firm Semiconductor Insights gave an award to for its new design and technology innovation, reached a new milestone, with more than one million of the chips shipped.

And given its expanded use, with the heightened interest in Power technology in a variety of industry segments, IBM, which designs and manufactures the chips, said it will expand its Power Architecture Technology Center in Shanghai, operated by IBM Engineering & Technology Services, to help clients create their own product designs using the technology. IBM expects support for this center could reach 150 people during the next 18 to 24 months. This would occur through a significant increase in IBM staffing as well as through teaming with local companies that provide engineering skills.

In a related product development, TimeSys, headquartered in Pittsburgh, PA, announced the availability of its TimeStorm Linux Development Kits for IBM PowerPC 750 FX and GX. Thousands of embedded Linux developers worldwide from a range of industries have chosen TimeSys solutions to streamline the development, customization and validation of homegrown or commercial Linux-based embedded systems.

A First in Wet Manufacturing

Innovation in processes used to make chips contributes to IBM's leadership in the area. Dr. Bernard Meyerson, chief technologist, IBM Systems & Technology Group, revealed new details of its pioneering use of immersion lithography.

IBM is the first company to successfully employ this "wet" process to produce commercial microprocessors. These chips, based on IBM's Power architecture, were literally patterned underwater, an industry first.

Using light to pattern chip features in air is reaching the point where one cannot consistently make such features small enough, he explained. The wavelength of light used for patterning chips in a process called lithography is now actually far larger than the features one is making, greatly limiting future progress. Working in a liquid such as water, light can be "bent" more efficiently than in air, enabling it to be directed with greater precision, in theory aiding greatly in chip manufacture. In practice, however, the most fundamental question remained, would challenges due to working "underwater" prevent one from building products with this technique. IBM's successful manufacture of commercial Power microprocessors using immersion has dramatically increased confidence in this new technique's future.

"This advancement holds great promise for continuing progress in chip manufacturing technology well into the future," Dr. Meyerson told the audience.

IBM also announced the addition of two "synthesizable" processor cores, meaning they are easier to manufacture at foundries other than IBM's. They are the IBM PowerPC 440S and the IBM PowerPC 405S, available this month and expected in the first quarter of next year, respectively. A third synthesizable processor core, the IBM PowerPC 450, targeted for the networking and communications segments, is expected to be available in 2006.

Support From Venture Capital Community

Power Architecture technology has drawn the interest of venture capital firms, too. "Venture capital firms have invested in telecommunications, semiconductors and consumer electronics. Power.org can help companies in these segments develop new customers and generate new revenue from their investments in Power," said Robert Jelski, global head of electronics investments for the venture capital company, 3i.

Breakthrough with Toshiba, Sony

This drumbeat of success for the Power Architecture technology -- found in products ranging from game systems to blades and from desktops to supercomputers -- came only days after one of the more significant announcements in the history of this customizable technology, that of a breakthrough related to the microprocessor known under its code name, Cell.

Sony Group, IBM and Toshiba Corporation, working together on this revolutionary technology, revealed the first technical details of the chip, which is based on Power and will accommodate Linux as well as other operating systems. The companies have invested more than $400 million in this project. Because it is Power technology it can be easily customized for leading-edge performance, low power consumption and advanced function.

PowerEverywhere Beijing was part of an ongoing initiative to enable more companies, universities and even individual developers to use the Power Architecture technology, to innovate on it, and to share ideas in product design.

The model of Power.org will bring more strength to the architecture, because more design and software tools to develop devices using the Power instruction set will be made available, while more developers will have a place to meet, connect, collaborate and innovate on consistent interfaces. This should result in the development of more function-specific devices and systems, lower costs and improve time to market.
1. So IBM makes it "official"; CELL is just a customized POWER processor.
2. There is no aircooled POWER processor that clocks above 2.0 Ghz now. You need a liquid cooler to go 2.5 Ghz. CELL was not liquid-cooled.
3. CELL APU is PowerPC 450, not 350 as previously reported. My apologies.

There's a major flaw in your thinking process tho, if Cell is a customized Power arcitecture, then how the hell would you even fathom it's capabilities if they haven't offically showed them?(Hence the aformetioned "Custom") I mean hell it could be a totally different instruction set and layout and die process(Especially considering your trolling for a Power arctechiture without knowing any specifics about it's modifications and certain stages of development in the upcoming PS3). Custom, don't you see the inherent problem with just assuming a shell of a processor named Power, then placing Custom in front of it, warrants absolutey nothing but a name? LOL dude get over the mellowdramtics.

Your second point is moot has well. How can you conjure up an upcoming opnion on a "Custom" Power arctectiture? All we have is minimial info about it's operating temperture bein offically unveiled, besides the announcement on Nov 29 about it operating at 85 C. I mean even that number is vague from the offical report from IBM. You have no idea what process they used to indicate it's operating struture temperture. Was it during Optimal Usage? Was it during Idle fuctioning? Was it this or was it that? You see what I'm saying. Plus you were assuming that statement you made in your second point that Cell wouldn't be liquid cooled. You know this again how? Some odd reference from a lab tech at IBM that frequents internet message boards and some how indicates that a certain "Custom" Power chip he's not fully involved with has had trouble keeping under so and so temperture for certain tests that he doesn't collect data for? LOL that's what I thought. LOL

Well atleast in your 3rd Hypothesis, you were more open to the chance that you were wrong, and more then likely are.

Another strong advent of advice for you. Assumptions, even from reliable sources can't garantee an ownage in this forum. But I will tell you this, common sense and logical reasoning sure hell increase your chances.

example: Custom Power Architectures developed not just for broadband communications and content doesn't indicate what IBM,Sony & Toshiba have in mind for all media applications that this newly developed "Custom" Power processor will serve in the future. Remember that last part when you try to comprehend the point of the previous statement. Thanks for playing. Plus Custom has a word to decribe anything is about has ambigious a term has you could use to try and own someone. Next time think harder.

[cpiasminc]

Actually, I would shut up and not come back if that was the case.
Don't sell yourself short, deadmeat. You're a lot more obstinate and hardheaded than that. No one conveniently skips over details to fuel baseless assumptions better than you. The world is no match for your obfuscated logic.

[Dralor]

Cpiasminc missing a hint about reading a private message are we. :P
If you stop arguing with him he will cease to come here because he lost his sport.

[__Deadmeat]

if Cell is a customized Power arcitecture, then how the hell would you even fathom it's capabilities if they haven't offically showed them?
Because it is still a Power processor, purhaps???

I mean hell it could be a totally different instruction set and layout and die process
Which IBM never does nor does it make any economical sense. Remember that the budget was only $400 million, which isn't a lot of money.

Your second point is moot has well. How can you conjure up an upcoming opnion on a "Custom" Power arctectiture?
Because it is a custom "Power" architecture, same as the ones found inside PPC970 series, Power4(I won't say Power5), and Xbox Next.

All we have is minimial info about it's operating temperture bein offically unveiled,
Which is very useful since

1. CELL has same core as 970FX
2. CELL is fabbed on the same line as 970FX.
3. Since a 90 nm 970FX's Power core requires liquid cooling at 2.5 Ghz, you can reason that an air-cooled 90 nm Power core inside CELL MUST RUN SLOWER THAN 2.0 Ghz air-cooling limit of Power@90 nm.

You talk as if CELL is being fabbed on some exotic future fab technology; it doesn't. It is being fabbed alongside 970FX that is known to have an air-cooling limit of 2 Ghz.

You have no idea what process they used to indicate it's operating struture temperture.
All of IBM's published temperatures are "average" operating temperatures, which mean it could go higher under a burst load condition.

[rev>thanu]

dude, stop already and for once in your life have a logical and realistic conversation. I mean grow up already it's not funny and it's just ridiculous to see some one act the way you do. in the two generations of the sony playstation and PS2 both consoles turn out to be the most weak of the bunch. if ps3 turns out less powerfull than xbox 2 you think we about to care. i mean it sure would be a plus and a nice change this time around to have the strongest console but we really don't care. We already know that ps3 will bring keep going were ps2 left off and the franchises that have made ps1 and ps2 a true success will be coming back. that's all i really need for a guarantee purchase of ps3. So please do go away and your right yeah ps3 will be weaker and who cares as long as you go away. You keep with your bizarro world and will keep on going on planet earth.

[PeanutButterMunky]

NFactor, your sig is too damn big. Give the 56kers a break ;)

[kevindenoyette]

that sig is also lensflare-tastic. Jesus, my eyes.

[Z]

NFactor, your sig is too damn big. Give the 56kers a break ;)
Let me guess; you just upgraded from 56kb to something faster, right?
Well, that size is nothing. Something from 30% the screen size upwards is big and take few seconds to download. Give us a break (56kb users). We are cursed, and do not have an option. Either this or we go search for info on foot! (which may be faster in some occasions ;))

[Nfactor]

if Cell is a customized Power arcitecture, then how the hell would you even fathom it's capabilities if they haven't offically showed them?
Because it is still a Power processor, purhaps???

(Still just sidestepped the word "customizied" has a word to describe what the upcoming modifications are to the Power arctechiture. Please, if it's "Customizied" , that means it's something you haven't seen yet. Are you getting this yet. All you can come up with is Customizied(has in mutiple configurations for multiple implications) uses for other Power Architectures, for other companies, that have no grounding bases has to what Sony will use their Customizied Power Arcitechiture for in the PS3 model. You've been raped by logic here again. LOL)

I mean hell it could be a totally different instruction set and layout and die process
Which IBM never does nor does it make any economical sense. Remember that the budget was only $400 million, which isn't a lot of money.

( So Sony and Toshiba's budget in this fabrication process for there own upcoming implications of this "Custom" Power arctectiture, have no bearing on what technology and development costs are being adhered to there own versions eh? I kinda doubt it. Even if that was true, The product contracts on the development of a "Custom" Power Arctechture for both Sony and Toshiba wouldn't be completed funded and resourced only to IBM themselves. That's why companies join together to pay for R&D. Not just one arm of a venture controls all decisions made. You've been raped by common sense again.)

Your second point is moot has well. How can you conjure up an upcoming opnion on a "Custom" Power arctectiture?
Because it is a custom "Power" architecture, same as the ones found inside PPC970 series, Power4(I won't say Power5), and Xbox Next.

( Do you see the fundamental problem with that statement you just made? Have we not gone over and over again what the word Custom entails? How again is Custom=same has the ones found inside PPC970 series? LOL . You do realize that Custom inherently means "No two are the same, because they're different" LOL. Only thing that anyone can make out of your response up there is that, each "Custom" Power arcitechture is different, which means that none are the same. You getting this yet??? LOL)

All we have is minimial info about it's operating temperture bein offically unveiled,
Which is very useful since

1. CELL has same core as 970FX
2. CELL is fabbed on the same line as 970FX.
3. Since a 90 nm 970FX's Power core requires liquid cooling at 2.5 Ghz, you can reason that an air-cooled 90 nm Power core inside CELL MUST RUN SLOWER THAN 2.0 Ghz air-cooling limit of Power@90 nm.

You talk as if CELL is being fabbed on some exotic future fab technology; it doesn't. It is being fabbed alongside 970FX that is known to have an air-cooling limit of 2 Ghz.

(Well your making an effort, but not quite. Now tell me something. You've been going on and on about "Custom" Power Arctechture being developed for Sony's PS3. Well if I'm not mistaken wasn't this announcement on what the "Prototype" of the CELL based workstation CELL core was based on? A 90nm fabbed "Custom" Power Core to be more exact. I mean unless you can even prove to me that the "Prototype" now, not the actual soon to be manufactured 65nm IBM "Custom" Power core being fabbed for PS3, that the 970FX was operating in whatever state it was in just prior to this "official" announcement from all three companies a couple of days ago was the same has the CELL's (Custom Power Core) that was just officially made public has being the same. Meaning CELL's operating temp at 85 C should be just the same has what was being achieved with a 970FX core. The thing that really makes this even more far fetched tho is. Even if they are the same, the core is going to go under a different fab process for the PS3 being shrunk down to 65nm by 2005. Thus it's impossible to predict what new "Custom" modifications they will add to the processor over the coming year has they ramp up 65nm fabs for the CELL for PS3 over 2005. Are you getting it now how different a "Custom" Architecture and Core can change especially in they're shrinking the fab process for what Sony is actually going to use the processor for in PS3. LOL dude your so easy to take apart LOL

You have no idea what process they used to indicate it's operating struture temperture.
All of IBM's published temperatures are "average" operating temperatures, which mean it could go higher under a burst load condition.

(Well I'm sure a tweak or two to a "Customizied Prototype" of a 90nm Power Core is in order since neither the WS or PS3 have come down to even a finalized version of the 90nm CELL processor, not mention what they'll do when they shrink it to 65nm next year.)

[xbdestroya]

NFactor I don't know why you're bothering to argue with him - but that being said, I'm not sure I understad what you just wrote up there. :wink:

[Nfactor]

NFactor I don't know why you're bothering to argue with him - but that being said, I'm not sure I understad what you just wrote up there. :wink:

All I'm trying to get across is, is that when you say something is Custom, it means it's different and not the same, like are insane friend up there is trying to preach. That a custom power core and arcitecture are the same has other custom power arcitectures. Which doesn't make any sense, since the Cell is a prototype and not in production, among other things. That's all really.

[xbdestroya]

Ok cool, I getcha now. In the world of processors though, if it actually were a 'custom' PPC, Deadmeat would be right in saying that it's thermal and pipeline characteristics would be nearly identical to the existing PPC core that was tweaked to create it.

He's from a school of thought that thinks this must be a custom PPC; most others on this board feel it is entirely different (in terms of the APUs, whch seem to be the point of contention). Even the PE, in my opinion, is probably more derived from Power than it is a custom existing core of Power, but who knows - I would be willing to accept otherwise on that one point.

Anyway the patents would indicate that the APU's are quite different from PPC cores. I can't explain it as well, because I'm not in the industry, but cpiasminc and some others have done a good job of extrapolating and interpreting these things.

The fact is Deadmeat does make some good points - he obviously has a strong technical grasp of microarchitecture. For my part, I believe he is wrong and avidly anti-Sony. I think it stems more from his not wanting to believe such a quatum-jump in computational power could be real, let alone have it's inception in a video game console. There are a lot of people out there who don't think the Cell chip will live up to the hype, simply because it would totally break from the pack in terms of historical trends for processor performance.

Anyway we'll know (a lot) more in February.

IBM is pushing the whole Power thing in China, as I read today, and similar to what Deadmeat posted. And Sony is in on that. And Cell apparently is also part of this push, in what ways I don't know.

Anyway it does leave a question mark over one's head as to whether in the end these companies will consider Cell an off-shoot from the main Power line or an evolution in a different direction with it's own future R&D alottments for improvement. I feel we're starting to get some conflicting signals.

[The_One]

@Deadmeat: You didly frekin' doo WIN. Yeah, I give up. You out smarted me like, what, 1000 million times? (That makes a billion buddy...)

So... who cares? No one. Just like Rev said, we got a PS2 not for it's sheer power, but for it's great games. IF the PS3 pulls out to be what GAMERS like us expect from it, then it'll do as well as PS2 did. Not everyone is a tech freak like you, you know? Sure... Sony might lose a few hundred sales because of tech freaks like you, but I'm sure they won't mind... especially when there's another 75 million customers demanding their PS3 :lol:.

From now on, I'm not even gonna bother with ya buddy.

And just for the record, how much room for error are you willing to give? 'Cause I don't want you coming back when the CELL is 128 GFLOp/s and say "I was only ~40% off... Big deal" :roll:.

[PeanutButterMunky]

@Deadmeat: You didly frekin' doo WIN. Yeah, I give up. You out smarted me like, what, 1000 million times? (That makes a billion buddy...)

So... who cares? No one. Just like Rev said, we got a PS2 not for it's sheer power, but for it's great games. IF the PS3 pulls out to be what GAMERS like us expect from it, then it'll do as well as PS2 did. Not everyone is a tech freak like you, you know? Sure... Sony might lose a few hundred sales because of tech freaks like you, but I'm sure they won't mind... especially when there's another 75 million customers demanding their PS3 :lol:.

From now on, I'm not even gonna bother with ya buddy.

And just for the record, how much room for error are you willing to give? 'Cause I don't want you coming back when the CELL is 128 GFLOp/s and say "I was only ~40% off... Big deal" :roll:.I wouldn't confuse tech freak with someone who blindly posts random information based on ignorant nothingness he gathered from nowhere. Specs are specs, and the ones HE posted aren't it. So let's just wait it out for a few months until juicy information is released ;)

[indiekid4]

I'll be looking forward to rubbing it in deadmeats face once the Cell ends up being as powerful as SOny says it will be.

[PeanutButterMunky]

indiekid...you have yet to change your huge, and obnoxiously-sized avatar that takes a year to load...:roll:

[indiekid4]

indiekid...you have yet to change your huge, and obnoxiously-sized avatar that takes a year to load...:roll:

odd, i didn't know it was that huge..lol. OIn my computer it looks normal size. The thing is, I can't change the size of it, or that I don't know how too. I tried saving it but it only saves it as a still image. Any help?

[PeanutButterMunky]

Well...your avvy is a friggin megabyte...I'll try and make it smaller...if I can't...change your avvy...

Here you go:

http://uploads.savefile.com/users/uploads/kungfu_idiot.gif

It's 176kb...but I made it look like ass, so I failed :cry: If you hate it, change your avvy...

[Nfactor]

that sig is also lensflare-tastic. Jesus, my eyes.

Yeah I know, it's some artificial lighting flares i put in to give my drawling there a more anime-like look to it. Sorry if it was burning your eyes tho. 8)

http://img.photobucket.com/albums/v481/Nfactor/Playstation-2-Ownage-Listwe.jpg

[islander]

it looks like Sony has made a grave mistake by showing the cell architecture that early. they forgetting MS is watching them like a hawk and of course the fanboys :? .

[amod20002004]

just a question: 4,66 mhz isn't a bit small compared with what Sony promised us for the new play3...
I mean: the actual emotion engine is about 233 mhz, the 4,66 ghz of the new one is about 20 times the actual emotion engine....
...reading the rumors on the internet my expectation for the new chip was of something of really powerful...something at least 100 times bigger than the actual emotion engine and bigger than any other actual processor as the latest Pentium ...
...I know that what I wrote sounds stupid, and I'm not a computer technician or engineering for judging or saying thing about the features of a machine...it's just a consideration...
...my expetation is so big, expecially now after San Andreas, I wonder what kind of games we will play in 4-5 years
ciao!

you have no idea what your talking about...

...exit through the rear please...and please, dont come again.
This is not a proper way to talk with anyone, especially with new member. You must lower your ton.
To Mmaat,
Mmaatt, I think you should ignore such kind of people. Arguing with children is pointless.

[Rallyracr420]

it looks like Sony has made a grave mistake by showing the cell architecture that early. they forgetting MS is watching them like a hawk and of course the fanboys :? .

Its kinda hard to hide a multibillion dollar effort between 3 companies the size of Toshiba, IBM, and Sony. And don't forget Sony is watching MS too..the Sony will have a year to upgrade the PS3 to be better than the XBoxNext.

[Brandon]

It's possible that they could be releasing it a bit earlier than expected, but Sony is keeping a tight seal [not as much as Nintendo, though]. Next year will be a wonderful time for everyone =)

And Nfactor...that is the best picture I've ever seen ;)

[Matt]

Anything Cell-related goes here:

http://www.psinext.com/forums/viewtopic.php?t=2872