What "bit" is the ps3 processor?

[ireland24]

you know..

snes: 16 bit
psone: 32 bit
ps2: 128 bit
PS3: ???

sorry if this has been said before,and its probably irrelevant too,but something in the back of my mind is dying to know!
thanks :)

[diOndOrAntt]

256

[Handycrap101]

Isn't XBOX 360 528?

[Goki]

This must be one fo the most interesting questions so far heh

Well I wouldnt know, but one thing im sure of is that we are past the days of measuring "bits" i think its got something to do with colour, although i may be wrong, but since we know we have machines that can produce colours in millions the "bit" thing is highly irrelevant these days i think. Mostly now people look at processor and graphics card. B4 like with mega drive and all, machines had maximum colours of 256 i think.


Hey Dion, did u make that number up or do u actaully know that to be true. Well 256 sounds kinda low, but i wouldnt know..

[diOndOrAntt]

I dont know 100% sure i goted it from the cell sticky

[julps31]

I think the Cell CPU is a 64 bit processor.

[The_One]

Each SPE core is 32 bit I believe. Either that or it's 64 bit, no way is a single core 128 bit though.

The thing is, bit doesn't really matter, you hardly ever need 128 bit and 64 bit will suffice.

[threepac3]

you know..

snes: 16 bit
psone: 32 bit
ps2: 128 bit
PS3: ???

sorry if this has been said before,and its probably irrelevant too,but something in the back of my mind is dying to know!
thanks :)

Well i ask this same question about 2 - 3 years ago, even tho i knew that consoles can nolonger be applied to this pattern.

But if i was to lets say complete this pattern i would say 512 - 1024. :lol:

[diOndOrAntt]

Each SPE core is 32 bit I believe. Either that or it's 64 bit, no way is a single core 128 bit though.

The thing is, bit doesn't really matter, you hardly ever need 128 bit and 64 bit will suffice.

Arent u saying the same as me?

1 spe 32bit x 8 = 256 bit

[ireland24]

so i guess it more about the mhz now than bits?

[the legendary ice man]

bits and hertz are completely different

hertz is a measure of frequency, while a bit can have two distinct values - 0 or 1.

kilobits maybe...although I think CPU terms stick to bits...

[threepac3]

so i guess it more about the mhz now than bits?

Nah its not even that anymore, its pretty much overall performance that determins game quality.

[The_One]

so i guess it more about the mhz now than bits? Hertz and Bits are both meaningless when it comes to the actual performance. Can you say the PS2's 128 bit EE is more powerful than a AMD 64bit?

On the same token, can you say the Xbox's 733Mhz CPU is more powerful than PS2's 295Mhz EE?

The simple answer is: You can't.

The overall performance comes from many factors, including the RAM, bandwidth, cache, etc... and most importantly, how well the system is utilized by the devs.

[the legendary ice man]

bus speed. I wonder how fast 25.6 Gbp/s is in real terms...

[The_One]

bus speed. I wonder how fast 25.6 Gbp/s is in real terms... That's equivalent to 3.2GBp/s (GigaBytes!).

[the legendary ice man]

I meant if it was a real bus - driving around...

Been a long day and I'm full of strange questions...

[Handycrap101]

Is it even possible for speed to be measured in GB's? Speed is distance/over time.. im not sure what bytes are but that question is impossible to answer.

BTW, iceman and the one, you guys have been going nuts posting in the past like 10 mins...

[ireland24]

I meant if it was a real bus - driving around...

Been a long day and I'm full of strange questions...

lol :lol:

[ireland24]

I meant if it was a real bus - driving around...

Been a long day and I'm full of strange questions...

Hes actually kind of got a point there,cause on the nvidia website they say the xbox is so powerful that:
if the HyperTransport link in the Xbox was a pipe carrying water, and every bit of information equalled one gallon, the pipe would fill up the Pacific Ocean every second!

and whatnot.

[the legendary ice man]

That fast eh'?

[Handycrap101]

If thats true then the rumors of PS3 being 3x faster then XBOX 360 then the PS3's pipe would fill up the entire planets water supply every second... or close to it.

[Viper]

Bit depth is not a very useful measurement for comparison.

GC and Xbox are both 32/64 bit hybrids but the PS2 is a 128 bit machine and it's easily argued the PS2 is slightly less as powerful as the other two.

Hertz is the same way. The Xbox uses an aluminum Pentium 3 chip at 733 Mhz yet the GC has a 485 Mhz copper IBM chip that is capable of processing the same amount of data, if not more so, than the Xbox chip even at the lower clock cycle.

The best performance measurement today is probably FLOPS. Floating Point Operations Per Second. GFLOPS is the current increment of the measurement used most often; 1 billion instructions are processed each second.

[haggisns]

I am wondering what bit the memory architecture is?

For MMORPHs games in order to have maps that are more than 2 gigabytes in size don't we need 64 bit memory addresss?

In the PC World's don't the Servers have huge maps that are upto 2 gigs per area, do players seemlessly move from one area to another across servers?

Will the MMORPHs with thousnads of players be run on servers or are we talking peer to peer grid computing, how on earth is that done?!
If you want to have extremely detailed gigantic maps with thousands of players and carry these MMORPH worlds forward for the next 5 to 10 years
there had better be mucho memory addressing.

Someone please enlighten me/us.

thanks

haggisns

[Brandon]

The PS3 will have a 64-bit architecture.

http://arstechnica.com/articles/paedia/cpu/cell-2.ars

[cpiasminc]

The PPE is the main CPU, whereas the SPEs all count effectively as coprocessors. The PPE conforms to a general PPC ISA, which uses general-purpose registers that are 64 bits wide. Hence, it's 64-bit. Pretty simple, no?

The SPEs, if you wanted to consider them individually, are basically SIMD chips. It can operate on 4-vectors of single or 2-vectors of double precision. Either way, their registers are 128 bits wide, so they're 128-bit, even if it can't operate on field sizes larger than 64-bit.

Actually, given the numbers I saw for the double-precision performance on the SPEs, I'd have to assume that IEEE double ops are not inherently built in, but are handled through some microcode to reconfigure the control flow. Quite likely that 32-bit single precision is the largest field it natively supports.

I am wondering what bit the memory architecture is?
XDR is serial in nature, so it won't be wide as much as higher clocked and well suited to continuous streams from a single active page. The single-CELL w/ 8 SPEs that was shown had two [presumably] independent XDR controllers which were 32-bits wide each (which is the normal controller width for XDR).

256
1 spe 32bit x 8 = 256 bit
Ummm... it doesn't matter how many cores there are. The size of the registers don't change just because you have more cores -- only the number of registers.

Isn't XBOX 360 528?
Who said that? Whoever told you that, smack him, would you please? For god's sakes, that's an odd multiple of a power of two (33 * 16 = 528), which means it is 100% impossible. No matter what the processor, all CPUs that have been made for the past 3 decades or will ever be made in the forseeable future will have a "bitness" that is a power of two.

[smacabre]

The bit thing is a bit dodgy, there are so many different ratings within any architecture.

The ps2 EE GRP's are 128bit, the VU floating point registers are 128bit, and the DMA transfers 128bits/clock cycle. The GIF (GS interface) processes 64bits/cycles, GS registers are16bit, but frame page reads are at 2048bit (1024bit read, 1024bit write), texture page reads are at 512bit, and DRAM to frame and texture page transfers are at 8192bit. Ultimately, the ps2 was marketed as 128bit, because 128bit (32x4) processing was a new thing in consumer embedded systems.

From the docs on SCEA's research page, the PPU core is 64-bit, but the AltiVec co-processor operates on 128bits. The SPU registers are 128bit, and the Cell element-interconnect bus is rated at 96b/cycle, or 768bit. My guess is that the Cell will be considered the a 64bit system, because, once again, 64bit (64x1) processing is all the rage these days.

In the end, it's all bullsh... er... marketing, so I say, pick your favorite from the list and stick to it.

[The_One]

and the Cell element-interconnect bus is rated at 96b/cycle, or 768bit. Uh, I don't get how you got that. The EIB should be measured using bandwidth, and not "bit". Unless there's another piece of the picture I'm missing... :roll:.
If I'm correct, using your logic, the EIB would be "384000000000bit" at 4Ghz (96 * 4,000,000,000). Alas, the EIB isn't 384000000000bit... So I think you went wrong somewhere.

[edofall]

!!!!!!!!!!!!damn smart people :shock:

[smacabre]

In this case, bits measure the width of the transfer medium. To calculate the bandwidth, you'd multiply the width (96B, or, 768b) by the bus clock speed (presumably, 4GHz), to get 384GB/s, the maximum amount of data that can be transferred per second.

Here's the math:

96B
--------- *
1 cycle

4 billion cycles
------------------- =
1 second

384GB
-------------
1 second


I got the 96B/cycle figure from the Cell GDC presentation at http://research.scea.com/research/html/CellGDC05/10.html.

For comparison, the ps2 EE DMA pushes 128b/cycle at 150MHz (DMAC runs at half the CPU clock speed), or 2.4GB/s, which you can verify here
playstation2-linux.com/files/ agdc2002/Introducing_PS2_to_PC_programmers.ppt.

[The_One]

Yeah, I thought it was 384GB/s also. Man, that's A LOT of bandwidth though! I wonder what kind of crazy wonder the CELL can do in the PS3...

[cpiasminc]

Yeah, I thought it was 384GB/s also. Man, that's A LOT of bandwidth though!
Yes, but that's internal to the die. Moreover the EIB as a ring design means there's still hop latencies if you're jumping between faraway SPEs. Either way, people will want to avoid shuffling between SPEs as much as possible, I'd imagine. Unless of course, it's found it's just really totally free to do so.

So the real downside of it won't be that the total EIB bandwidth won't be enough, but that the per-cycle bandwidth may not be enough and you end up creating long pipeline stalls. Note that its 96 bytes per cycle is total throughout the bus. If all the SPEs are shuffling data between each other and the PPE, you could have some issues. With SIMD code, instruction latency has a huge impact.

[the legendary ice man]

Yeah, I thought it was 384GB/s also. Man, that's A LOT of bandwidth though! I wonder what kind of crazy wonder the CELL can do in the PS3...

I said it before, and sourced it. Movie SFX capable games.