How many Cells can you get on a wafer? (56k)

[O.D.S]

How many Playstation 3 Cells can you get on a wafer?

Can you count?

IBM WAS WAVING a lot of cells around at MPF. It had CPUs, dies and wafers of shiny Playstation 3 goodness.

If you ever wondered how many Cells can dance on the head of a 12-inch wafer, all you need to do is count. So, without further delay, here is a wafer of Cells, a closeup of four chips, and the back of the finished CPU. The front is entirely a thermal lid.

Enjoy
LINK: http://www.theinquirer.net/?article=27340

IMAGES:

http://www.theinquirer.net/images/articles/Cell_wafer2.jpg

http://www.theinquirer.net/images/articles/Cell_closeup2.jpg

http://www.theinquirer.net/images/articles/Cell_chip_closeup.jpg

[xbdestroya]

Yeah, saw this this morning. Nice seeing them all there on that shiny wafer. http://community.the-underdogs.org/smiley/happy/cool4.gif

[stanDarsh]

Nice images.

I counted about 228 potentially useable processors on that wafer, but I could be wrong ;)

[xbdestroya]

EDIT: Nevermind, Stan I think you're right there! :)

[Viper]

Nice images.

I too counted 228.

[KnightRiderX]

ok now why is it that i'm counting ~340.

Cause every rectangle on the big wafer seems to consist of two CELLs. Just take a look that the second pic. u can easily see the SPEs on each CELL which makes it 2 CELLs on each rectangle.

Obviously one rectangle cannot be one CELL because right across it, u can see light penetrating throught it.

EDIT: Now that I think about it, i'm counting 344, if assumed that one of the CELLs on a rectagle will work properly even if the other is damaged.

[cpiasminc]

Now that I think about it, i'm counting 344, if assumed that one of the CELLs on a rectagle will work properly even if the other is damaged.
It can't be quite that high. That's a 300 mm wafer, which means the total area of the wafer is only ~70,685 sq mm. With CELL at around 220 sq. mm, that means that without taking into account the edge effects of rectangular vs. circular shapes, you can't possibly have more than 70,685 / 220 = ~321 die candidates.

[KnightRiderX]

Oh my bad. my calculation was a little off. Although I was assuming that there were 2 in each rectangle, I multiplied by a magnitude of 4 (how I came up with 4 is beyond me).

Ok now i'm getting also 228.

EDIT: OK now that I think about it, I realize that I totally messed up my calculations by omitting some sections. I guess thats wat i get for depriving myself of sleep for over a day. :dur:

[Glacier]

If you ever wondered how many Cells can dance on the head of a 12-inch wafer, all you need to do is count.
No, I've never wondered about Cells,and wafers, at least not together. Because I don't know what does having so many Cells layed inside a wafer mean? Can anyone explain, please?
And sorry I didn't count them Cells. My eyes were full of tears the moment I looked at them precious Cells. The sight of them was breathtaking!

[cpiasminc]

No, I've never wondered about Cells,and wafers, at least not together. Because I don't know what does having so many Cells layed inside a wafer mean? Can anyone explain, please?
It's giving a sense of scale as to the sort of production volumes that can be achieved. The more dies you can get on a wafer, the better your potential yields, the higher your potential production volume, the quicker you can get your production line to maturity, the cheaper the chip is to produce, and so on. If you just think about yield rates being some percentage, that percentage is out of the possible die candidates you get per wafer. Typically, 50% yield rate is considered minimum before a production line can be called "mature." Assume that a certain fraction of that will be binned at 3.2 and up and others will be binned lower, that's probably a good 50-60 PS3s worth of CELLs coming out of one wafer -- a single SOI wafer costs about $250-$325 US, IIRC (although that's somewhat of an old figure, it's probably come down since then [thank AMD for that]).

My eyes were full of tears the moment I looked at them precious Cells. The sight of them was breathtaking!
Ummmm... you do realize that the fact that they're being put on display means that they would otherwise be headed for the trash heap, right?

[venomv]

Assume that a certain fraction of that will be binned at 3.2 and up and others will be binned lower, that's probably a good 50-60 PS3s worth of CELLs coming out of one wafer -- a single SOI wafer costs about $250-$325 US, IIRC (although that's somewhat of an old figure, it's probably come down since then [thank AMD for that]).

Wait a sec, with those numbers (and I know your estimating but you seem to know what your talking about) worst case scenario 50 cells at $325 per wafer means $6.50 per chip. That not much in the way of production costs, and since they are going to use the cell for more then just the PS3 the research costs will be made up faster I see no reason why the PS3 should cost as much as people are saying.

[cpiasminc]

Wait a sec, with those numbers (and I know your estimating but you seem to know what your talking about) worst case scenario 50 cells at $325 per wafer means $6.50 per chip.
Well, yeah, the cost of the wafer adds very little to the cost of the chip. The real costs come with the ownership and operation of the expensive machinery, engineers on staff, maintaining clean-room conditions, testing phases, packaging phases, etc.

But yeah, raw material costs? cheeeaaap.

[Glacier]

My deep gratitude Cpiasminc. You did a great job, illustrating, thanks.
For further info regarding wafers, and dies here is an article from wikipedia:

Semiconductor-die cutting

In the manufacturing of micro-electronic devices, die cutting or dicing is a process of reducing a wafer containing multiple identical integrated circuits to dice each containing one of those circuits.

During this process, a wafer with up to thousands of circuits is cut into individual pieces, each called a die. In between the functional parts of the circuits, a thin non-functional spacing is foreseen where a saw can safely cut the wafer without damaging the circuit. This spacing is called the scribe. The width of the scribe is very small, typically around 100 μm. A very thin and accurate saw is therefore needed to cut the wafer into pieces. Usually the dicing is performed with a water-cooled circular saw with diamond-tipped teeth.
http://en.wikipedia.org/wiki/Die_cutting